[PATCH] [POWERPC] 85xx: Add next-level-cache property
Segher Boessenkool
segher at kernel.crashing.org
Tue Jun 3 07:06:27 EST 2008
>>> Added next-level-cache to the L1 and a reference to the new L2 label.
>>
>> Where is this property defined? I can't find it.
>>
>> The PowerPC binding defines an "l2-cache" property for this (it
>> points from CPU node to L2 cache node, from L2 cache node to L3
>> cache node, from L3 cache node to L4 cache node, etc.)
>
> So looking at the PPC binding its not terrible clear about "l3-cache"
> being a valid property.
It isn't. The property is called "l2-cache" at every level.
> I believe the discussion w/ePAPR was to create something a bit more
> generic and clarify/update the PPC binding.
Nasty. Sure, "l2-cache" isn't the nicest name to point to deeper
cache levels, but introducing a new property with (substantially)
the same semantics is worse.
There really shouldn't be a new property name until new functionality
is introduced. For example, it could allow to describe more than one
cache at each level (the current binding already allows more than one
parent for each cache, but only one child; and cache hierarchies like
that actually exist).
> I'm going to stick with the new binding as we don't use this linking
> currently.
Dunno what's the best thing to do here. If you don't need the
functionality yet, it might be best to postpone putting either
property in there. Sigh, what a mess.
Segher
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