How to describe FPGA-based devices in the device tree ?

[Grant Likely]

On Feb 18, 2008 10:47 AM, Scott Wood <scottwood at freescale.com> wrote:
> On Mon, Feb 18, 2008 at 01:43:52PM +0100, Laurent Pinchart wrote:
> > Should I put IP core nodes as children of the FPGA node ?
>
> You could do that as well.

I'd recommend doing that, then your subnodes are isolated from changes
to the bus attachment (chipselect).  (really an insignificant point,
but I think it is a more logical layout).

So, something like this:
fpga at 4,0 {
        #address-cells = <1>;
        #size-cells = <1>;
        ranges = <0 4 0 00100000>;
        /* breakdown of 'ranges' fields: */
        /* "0": start address of internal range */
        /* "4 0": start address of external range (chip select 4, address 0) */
        /* "00100000: size of range */

        iocore at 0 {
                compatible = "foo,bar";
                reg = <0 00010000>;
        };

        iocore at 10000 {
                compatible = "foo,bar";
                reg = <10000 00010000>;
        };

        iocore at 20000 {
                compatible = "foo,bar";
                reg = <20000 00010000>;
        };
};

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.