[RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM

[Josh Boyer]

On Tue, 2008-04-22 at 14:08 -0600, Grant Likely wrote:
> On Tue, Apr 22, 2008 at 1:41 PM, Anton Vorontsov
> <avorontsov at ru.mvista.com> wrote:
> > Hi all,
> > +    w) NAND on UPM-driven Freescale Localbus
> > +
> > +      Required properties:
> > +      - compatible : "fsl,upm-nand".
> > +      - reg : should specify localbus chip select and size used for the chip.
> > +      - width : should specify port size in bytes.
> > +      - fsl,upm-addr-offset : UPM pattern offset for the address latch.
> > +      - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
> > +      - fsl,wait-pattern : should be present if NAND chip requires waiting
> > +        for Ready-Not-Busy pin after each executed pattern.
> > +      - fsl,wait-write : should be present if NAND chip needs waiting on
> > +        Ready-Not-Busy pin after each write cycle.
> > +      - linux,chip-delay : optional, may contain delay value in milliseconds
> > +        (in case when Ready-Not-Busy pin was unspecified).
> > +      - gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
> 
> I'm not competent to comment on this binding; I haven't spent any time
> looking at NAND binding conventions.

That's because there are none, and every time someone proposes one it's
like this.  Full of weird $board specific stuff that have nothing to do
with the actual NAND chip.

For example, why is fsl,wait-write defined as an fsl specific property?
It seems generic to the NAND chip itself.  Also, why in the example is
the specific NAND chip part number listed, followed by fsl,upm-nand?
It's almost as if people want to mix the NAND chip and NAND controller
definitions together.  Maybe there is a good reason for it, but it's
really confusing.

josh