[PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
Laurent Pinchart
laurentp at cse-semaphore.com
Fri Apr 18 00:23:56 EST 2008
On Wednesday 16 April 2008 20:39, Anton Vorontsov wrote:
> On Tue, Mar 18, 2008 at 03:48:12PM -0500, Scott Wood wrote:
> [...]
> > How about:
> >
> > struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer,
> > int width);
> >
> > ...with np->data used by the caller to figure out which gtm pointer to
> > pass in.
>
> Thanks for the comments, I've tried to address them all.
>
> Updated patch below (not for applying, still waiting for further
> comments, if any).
>
> - - - -
> From: Anton Vorontsov <avorontsov at ru.mvista.com>
> Subject: [POWERPC] sysdev,qe_lib: implement FSL GTM support
>
> GTM stands for General-purpose Timers Module and able to generate
> timer{1,2,3,4} interrupts.
>
> There are several limitations in this support:
> 1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
> This is straightforward to implement when needed, two timers should
> be marked as "requested" and configured as appropriate.
> 2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
> This is also straightforward to implement when needed, all timers
> should be marked as "requested" and configured as appropriate.
>
> Signed-off-by: Anton Vorontsov <avorontsov at ru.mvista.com>
> ---
> Documentation/powerpc/booting-without-of.txt | 32 +++-
> arch/powerpc/Kconfig | 5 +
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/fsl_gtm.c | 322 ++++++++++++++++++++++++++
> include/asm-powerpc/fsl_gtm.h | 106 +++++++++
> 5 files changed, 465 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/sysdev/fsl_gtm.c
> create mode 100644 include/asm-powerpc/fsl_gtm.h
[snip]
> +/*
> + * This is back-end for the exported functions, it's used to reset single
> + * timer in reference mode.
> + */
> +static int gtm_reset_ref_timer16(struct gtm_timer *tmr, int frequency,
> + int reference_value, bool free_run)
> +{
> + struct gtm *gtm = tmr->gtm;
> + int num = tmr - >m->timers[0];
> + unsigned int prescaler;
> + u8 iclk = GTMDR_ICLK_ICLK;
> + u8 psr;
> + u8 sps;
> + unsigned long flags;
> +
> + prescaler = gtm->clock / frequency;
> + /*
> + * We have two 8 bit prescalers -- primary and secondary (psr, sps),
> + * plus "slow go" mode (clk / 16). So, total prescale value is
> + * 16 * (psr + 1) * (sps + 1).
> + */
> + if (prescaler > 256 * 256 * 16)
> + return -EINVAL;
> +
> + if (prescaler > 256 * 256) {
> + iclk = GTMDR_ICLK_SLGO;
> + prescaler /= 16;
> + }
> +
> + if (prescaler > 256) {
> + psr = 256 - 1;
> + sps = prescaler / 256 - 1;
> + } else {
> + psr = prescaler - 1;
> + sps = 1 - 1;
> + }
Don't forget that the CPM2 doesn't support the primary prescaler.
> + spin_lock_irqsave(>m->lock, flags);
> +
> + /*
> + * Properly reset timers: stop, reset, set up prescalers, reference
> + * value and clear event register.
> + */
> + clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
> + GTCFR_STP(num) | GTCFR_RST(num));
> +
> + setbits8(tmr->gtcfr, GTCFR_STP(num));
> +
> + out_be16(tmr->gtpsr, psr);
> + clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
> + GTMDR_ORI | (free_run ? GTMDR_FFR : 0));
> + out_be16(tmr->gtcnr, 0);
> + out_be16(tmr->gtrfr, reference_value);
> + out_be16(tmr->gtevr, 0xFFFF);
> +
> + /* Let it be. */
> + clrbits8(tmr->gtcfr, GTCFR_STP(num));
> +
> + spin_unlock_irqrestore(>m->lock, flags);
> +
> + return 0;
> +}
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
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