[PATCH] tg3: fix MMIO for PPC 44x platforms
sshtylyov at ru.mvista.com
Sun Apr 13 03:01:22 EST 2008
The driver stores the PCI resource addresses into 'unsigned long' variable
before calling ioremap_nocache() on them. This warrants kernel oops when the
registers are accessed on PPC 44x platforms which (being 32-bit) have PCI
memory space mapped beyond 4 GB.
The arch/ppc/ kernel has a fixup in ioremap() that creates an illusion that
the PCI memory resource is mapped below 4 GB, but arch/powerpc/ code got rid
of this trick, having instead CONFIG_RESOURCES_64BIT enabled.
Signed-off-by: Sergei Shtylyov <sshtylyov at ru.mvista.com>
Reposting the patch with the log and summary corrected.
This is the same issue as the one that has been recently addressed by commits
3c34ac36ac1084e571ef9b6fb1d6a5b10ccc1fd0 (e1000: Fix for 32 bits platforms with
64 bits resources) and c976816b6e901341ec3c4653147316c15549a1c4 (siimage: fix
kernel oops on PPC 44x). The patch has only been compile tested though...
drivers/net/tg3.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
@@ -12578,7 +12578,8 @@ static int __devinit tg3_init_one(struct
const struct pci_device_id *ent)
static int tg3_version_printed = 0;
- unsigned long tg3reg_base, tg3reg_len;
+ resource_size_t tg3reg_base;
+ unsigned long tg3reg_len;
struct net_device *dev;
struct tg3 *tp;
int err, pm_cap;
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