[PATCH 3/3][POWERPC][V2] Xilinx: boot support for Xilinx uart 16550.

[Grant Likely]

On Thu, Apr 3, 2008 at 7:28 AM, John Linn <John.Linn at xilinx.com> wrote:
> Hi Johann,
>
> You're right about it being missing. I have another patch for virtex
> specific initialization that handles that.  I have not submitted it yet as I
> was trying to get these patches thru the system.
>
> I have been told in this forum that the bootstrap loader should not be
> setting up the baud rate and that normally the boot loader does it.
>
> In the case of FPGAs, we don't always use a boot loader so we need this to
> happen in the bootstrap loader.  I can forward that patch to you if you're
> interested before it goes to this group.
>

Yes, the reason for not fiddling with the clock rate divisor at this
point is that it increases the chance of getting at least *something*
out the serial port if the boot goes bad.  For example, if the device
tree has the clock rate listed incorrectly and the wrapper sets the
serial port baud rate then the serial port will become unusable for
bootwrapper debug.

So, in the FPGA case or other no-firmware situations there needs to be
a place to do this.  Thinking on it further, I suppose it really does
belong in the serial driver, but it needs to be protected so that only
board ports that explicitly request it will do baud rate setup.
Perhaps ns16550_console_init() should call a __weak function that can
be overridden by a board port with a version that returns 1 instead of
0.  (off the top of my head; there may be better approaches).

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.