[PATCH] [POWERPC] CPM1: implement GPIO LIB API

[Laurent Pinchart]

Hi Jochen,

On Tuesday 25 March 2008 17:56, Jochen Friedrich wrote:
> Implement GPIO LIB API on CPM1 Freescale SoC.
> 
> Signed-off-by: Jochen Friedrich <jochen at scram.de>
> ---
> 
> This is based on the series starting at 
http://patchwork.ozlabs.org/linuxppc/patch?id=17299
> 
>  arch/powerpc/platforms/8xx/Kconfig |    2 +
>  arch/powerpc/sysdev/cpm1.c         |  240 
+++++++++++++++++++++++++++++++++++-
>  2 files changed, 241 insertions(+), 1 deletions(-)
> 

[snip]

> diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
> index df8bd2b..c3d5df8 100644
> --- a/arch/powerpc/sysdev/cpm1.c
> +++ b/arch/powerpc/sysdev/cpm1.c
> @@ -30,11 +30,14 @@
>  #include <linux/interrupt.h>
>  #include <linux/irq.h>
>  #include <linux/module.h>
> +#include <linux/spinlock.h>
> +#include <linux/of_gpio.h>
>  #include <asm/page.h>
>  #include <asm/pgtable.h>
>  #include <asm/8xx_immap.h>
>  #include <asm/cpm1.h>
>  #include <asm/io.h>
> +#include <asm/gpio.h>
>  #include <asm/tlbflush.h>
>  #include <asm/rheap.h>
>  #include <asm/prom.h>
> @@ -403,7 +406,7 @@ struct cpm_ioport16 {
>  };
>  
>  struct cpm_ioport32 {
> -	__be32 dir, par, sor;
> +	__be32 dir, par, sor, dat;
>  };

I haven't checked all CPM1-based parts, but for the MPC855 family this doesn't 
look right. The MPC855 has two 32-bit ports, port B and port E. Registers for 
port B are dir, par, odr and dat, and registers for port E are dir, par, sor, 
odr and dat.

Are you working on a similar patch for the CPM2 ? CPM2 I/O ports are 32 bit 
wide and their registers are layed out like for port E on the MPC855. It 
should thus be possible to share code between CPM1 and CPM2.

Best regards,

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussée de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75
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