[PATCH 2/3][POWERPC][V2] Xilinx: of_serial support for Xilinx uart 16550.

[Stephen Neuendorffer]

I don't think big-endian has the same context as reg-shift/reg-offset.
The OpenPOC is fundamentally a 32 bit device, but ns16550 is not...  If
we were talking about a 32 bit device, then I'd probably agree with you,
but in this case, the reg-shift (and to some extent) reg-offset have
been used before and probably make more sense, I think.

Steve

> -----Original Message-----
> From: Sergei Shtylyov [mailto:sshtylyov at ru.mvista.com]
> Sent: Wednesday, April 02, 2008 1:20 PM
> To: John Linn
> Cc: linuxppc-dev at ozlabs.org; grant.likely at secretlab.ca
> Subject: Re: [PATCH 2/3][POWERPC][V2] Xilinx: of_serial support for
Xilinx uart 16550.
> 
> Hello.
> 
> John Linn wrote:
> 
> > The Xilinx 16550 uart core is not a standard 16550 because it uses
> > word-based addressing rather than byte-based addressing. With
> > additional properties it is compatible with the open firmware
> > 'ns16550' compatible binding.
> 
> > This code updates the of_serial driver to handle the reg-offset
> > and reg-shift properties to enable this core to be used.
> 
> > Signed-off-by: John Linn <john.linn at xilinx.com>
> 
> > diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-
> of.txt
> > index 87f4d84..af112d9 100644
> > --- a/Documentation/powerpc/booting-without-of.txt
> > +++ b/Documentation/powerpc/booting-without-of.txt
> > @@ -2539,6 +2539,17 @@ platforms are moved over to use the
flattened-device-tree model.
> >                        differ between different families.  May be
> >                        'virtex2p', 'virtex4', or 'virtex5'.
> >
> > +      iv) Xilinx Uart 16550
> > +
> > +      Xilinx UART 16550 devices are very similar to the NS16550
such that they
> > +      use the ns16550 binding with properties to specify register
spacing and
> > +      an offset from the base address.
> > +
> > +      Requred properties:
> > +       - clock-frequency : Frequency of the clock input
> > +       - reg-offset : A value of 3 is required
> 
>     I'm proposing you to use the already existing "big-endian"
property ISO
> "reg-offset" (used in the  nodes describing OpenPIC, for example).
> 
> WBR, Sergei