[PATCHv2] powerpc: Describe memory-mapped RAM&ROM chips OF bindings

[Sergei Shtylyov]

Laurent Pinchart wrote:

>>>On Monday 31 March 2008 19:06, Sergei Shtylyov wrote:

>>>>>       p) Freescale Synchronous Serial Interface
>>>>>-	  q) USB EHCI controllers
>>>>>+      q) USB EHCI controllers
>>>>>+      r) Memory-mapped RAM & ROM

>>>>    Memory-mapped RA/RO Memory again? Should better drop this. :-)

>>>You're quite picky, aren't you ? :-)

>>>I suppose "Memory-mapped RA & RO" won't be accepted, so what about "Auxiliary
>>>RAM & ROM" ?

>>Direct-mapped?

> Fine with me. Sergei ?

    I agree. The only thing that somewhat worries me it that it will have no 
"compatible" prop...

WBR, Sergei