[PATCH] [PPC 44x] L2-cache synchronization for ppc44x
benh at kernel.crashing.org
Mon Nov 26 17:47:30 EST 2007
On Thu, 2007-11-08 at 02:12 +0300, Yuri Tikhonov wrote:
> This is the updated patch for support synchronization of L2-Cache with the external memory on the ppc44x-based platforms.
> Differencies against the previous patch-set:
> - remove L2_CACHE config option;
> - introduce the ppc machdep to invalidate L2 cache lines;
> - some code clean-up.
> Signed-off-by: Yuri Tikhonov <yur at emcraft.com>
> Signed-off-by: Pavel Kolesnikov <concord at emcraft.com>
It's almost right :-0
You want something a bit more details than just a
I'd suggest you do a separate extcache_ops structure that contains
callbacks for all 3 directions (flush, flush & invalidate, invalidate),
then fill that up accordingly.
It might be a good idea in the long run to do some tricks to avoid a
branch via function pointer since the cache ops are pretty "hot", but if
that ever happens, I'll do that via asm patching tricks I suppose.
Now regarding the line size, I would recommend using the device-tree to
describe the cache instead rather than a config option. The intend is to
be able to build a single binary kernel that can boot multiple variants
I may eventually rewrite your patch around those ideas next week if you
don't feel like doing it -and- I get bored :-)
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