Problems in 2.6 memory management on 8xx

Joakim Tjernlund joakim.tjernlund at transmode.se
Fri May 25 01:23:19 EST 2007


On Thu, 2007-05-24 at 15:07 +0200, Detlev Zundel wrote:
> Hi,
> 
> working on a 2.6.16 kernel on a 870 CPU, I ran into this strange
> behaviour exemplified by the simple attached demo program.  An icbi
> from userspace on an address that is mapped only lazily gets into an -
> though interruptible - loop. Locking the icbi target in question with
> mlock circumvents this problem.

8xx is buggy w.r.t cache instructions. They do not update the
DAR register in the TLB miss/TLB error handlers.
The TLB miss handler does not use the DAR reg but the TLB error
handler do. Thats why it works when you mlock the memory.

This bug isn't documented but Freescale has confirmed it.
You can search the archives some years back for more info.

 Jocke

> 
> I tested this code on 2.6.21 on 4xx and 82xx only to prove that those
> combinations, as expected, don't have this problem.  Vitaly Bordug was
> kind enough to test the code on an 8xx hw supported by a recent kernel
> and acknowledged it still being present.
> 
> As I don't have time to investigate this any further, I at least want
> to document this problem with this post.  Maybe someone else can help
> out here.
> 
> Thanks
>   Detlev
> 
> plain text document attachment (Makefile)
> CC=$(CROSS_COMPILE)gcc
> AS=$(CROSS_COMPILE)as
> CFLAGS=-g
> 
> %.o:	%.S
> 	$(CC) -c -o $@ $<	
> 
> all:	icbi
> 
> icbi:	icbi.o icbi_trigger.o
> 
> clean:
> 	rm -f *.o *~ icbi
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