[PATCH] Remove CPU_FTR_NEED_COHERENT for 7448.

[Adrian Cox]

On Wed, 2007-05-02 at 16:34 -0500, Jon Loeliger wrote: 
> From: James.Yang <James.Yang at freescale.com>
> 
> Remove CPU_FTR_NEED_COHERENT for MPC7448 (and single-core MPC86xx).
> This prevents needlessly setting M=1 when not SMP.

There may be side effects to removing this. Most of the 74xx processors
had this flag added because of the L2 prefetch bug (erratum #16 on the
7447A). I see that bug is missing from the 7448 errata.

The problem is that many 32-bit PowerPC machines needed
CPU_FTR_NEED_COHERENT set for a second reason: compatibility with the
cache in the MPC107. This was handled by CPU_FTR_COMMON in cputable.h
before the L2 prefetch bug was known.  There may be other host bridges
that cache, but nobody will have noticed because all the CPUs had
CPU_FTR_NEED_COHERENT set already.

-- 
Adrian Cox <adrian at humboldt.co.uk>