[PATCH RFC 7/7] [POWERPC] MPC8360E-RDK: add support for NAND on UPM

[Anton Vorontsov]

On Tue, Dec 11, 2007 at 10:03:21AM +1100, David Gibson wrote:
> On Mon, Dec 10, 2007 at 11:49:51PM +0300, Anton Vorontsov wrote:
> > Signed-off-by: Anton Vorontsov <avorontsov at ru.mvista.com>
> > ---
> >  arch/powerpc/boot/dts/mpc836x_rdk.dts     |   24 +++++++++++++++++++++++-
> >  arch/powerpc/platforms/83xx/Kconfig       |    2 ++
> >  arch/powerpc/platforms/83xx/mpc836x_rdk.c |    1 +
> >  3 files changed, 26 insertions(+), 1 deletions(-)
> > 
> > diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
> > index a1b2da6..f57ba53 100644
> > --- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
> > +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
> > @@ -115,7 +115,7 @@
> >  			device_type = "ipic";
> >  		};
> >  
> > -		par_io at 1400 {
> > +		qe_pio: par_io at 1400 {
> >  			reg = <0x1400 0x100>;
> >  			num-ports = <7>;
> >  		};
> > @@ -229,4 +229,26 @@
> >  			interrupt-parent = <&ipic>;
> >  		};
> >  	};
> > +
> > +	localbus at e0005000 {
> > +		#address-cells = <2>;
> > +		#size-cells = <1>;
> > +		compatible = "fsl,mpc8360erdk-localbus",
> > +			     "fsl,mpc8360e-localbus",
> > +			     "fsl,pq2pro-localbus";
> > +		reg = <0xe0005000 0xd8>;
> > +		ranges = <1 0 0x60000000 1>;
> 
> The bridge translates a range one byte wide?  I don't think so...

Nope, 4KB min, IIRC.

> > +
> > +		nand-flash at 1,0 {
> > +			compatible = "STMicro,NAND512W3A2BN6E", "fsl,upm-nand";
> > +			reg = <1 0 1>;
> 
> The device has a register window *one byte* wide?  That seems
> improbable...

Here, actually yes. The device just 8 bits wide. Reading next 8 bits
will return the same value, obviously. ;-)

But points taken. I should not derivate chip width from the
ranges/reg. This looks unusual indeed, will implement chip-width
property.

Thanks,

-- 
Anton Vorontsov
email: cbou at mail.ru
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