FSL device-trees i8259 bugs (and others too !)

[Benjamin Herrenschmidt]

Hi !

I've been looking into making the 8259 driver properly apply the sense
setting to the chip. We'll probably need that for PReP and I was looking
into some issues with legacy IDE controllers flipping between legacy and
native mode since that changes the IRQ as well (legacy mode is rising
edge, while native mode is level low).

A bit of grepp'ing in arch/powerpc/boot/dts/ seems to show however that
this will break a few things in FSL land though.

First, let's quickly pass on mpc8555cds.dts which seems to have a
totally bogus 8259 node... Nodes below a PCI bridge are supposed to be
PCI devices. This isn't one, and that may cause problems in the long
run.

Then, it seems that mpc8544ds, mpc8572ds and mpc8641_hpcn all declare
interrupt maps that point to the 8259 as the parent controller... and
set the sense of all PCI interrupts to 2, which for an 8259 means
falling edge... Doesn't seem correct to me. PCI interrupts are level
low.

There might be more of such things, so if your platform uses an 8259,
please double check your IRQ sense encoding. Remember, for 8259, the
encoding is specified in the OF ISA spec and is:

	0 = level low
	1 = level high
	2 = falling edge
	3 = rising edge

Of course, Pegasos is broken, as usual, but I'll do quirks for it.

Cheers,
Ben.