[PATCH] Add IPIC MSI interrupt support

Li Li r64360 at freescale.com
Tue Dec 4 20:10:10 EST 2007


Yes. According to the PCI spec, a PCI device can request multi MSI
interrupts and require that interrupts are consecutive.
But it is ok if only allocate one to it.
Anyway, the hwirq should be allocated from bitmap instead of increment
by hand.

I will correct this and resend the patch.

- Tony

On Tue, 2007-12-04 at 15:51 +0800, Benjamin Herrenschmidt wrote:
> > I'm not sure what you mean? For MSI there is only one MSI per
> device, 
> > but this code is used also for MSI-X which supports > 1 MSI per
> device.
> 
> Or more specifically, for MSI, -linux- supports only one per device
> (in 
> theory, it's possible to have multiple MSI non-X but it's a mess).
> 
> > Either way we shouldn't be incrementing hwirq by hand, it's
> reassigned 
> > at the top of the loop. I think that's left over from old code that 
> > allocated nvec hwirqs in a block and then created virq mappings for
> each 
> > one, whereas the new code allocates each hwirq separately. 
> > 
> > cheers 
> > 
> > _______________________________________________ 
> > Linuxppc-dev mailing list 
> > Linuxppc-dev at ozlabs.org 
> > https://ozlabs.org/mailman/listinfo/linuxppc-dev
> 




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