[PATCH] Add IPIC MSI interrupt support

[Li Li]

On Mon, 2007-12-03 at 09:52 +0800, David Gibson wrote:
> On Fri, Nov 30, 2007 at 11:48:39AM +0800, Li Li wrote: 
> > The IPIC MSI is introduced on MPC837x chip. 
> > Implements the IPIC MSI as two level interrupt controller. 
> > 
> > Signed-off-by: Tony Li <tony.li at freescale.com> 
> > --- 
> >  arch/powerpc/boot/dts/mpc8377_mds.dts     |   14 ++ 
> >  arch/powerpc/boot/dts/mpc8378_mds.dts     |   14 ++ 
> >  arch/powerpc/boot/dts/mpc8379_mds.dts     |   14 ++ 
> >  arch/powerpc/platforms/83xx/Kconfig       |    6 + 
> >  arch/powerpc/platforms/83xx/mpc837x_mds.c |   11 + 
> >  arch/powerpc/sysdev/Makefile              |    1 + 
> >  arch/powerpc/sysdev/ipic_msi.c            |  359
> +++++++++++++++++++++++++++++ 
> >  include/asm-powerpc/ipic_msi.h            |   54 +++++ 
> >  8 files changed, 473 insertions(+), 0 deletions(-) 
> >  create mode 100644 arch/powerpc/sysdev/ipic_msi.c 
> >  create mode 100644 include/asm-powerpc/ipic_msi.h 
> > 
> > diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts
> b/arch/powerpc/boot/dts/mpc8377_mds.dts 
> > index 1f7819e..1068fe2 100644 
> > --- a/arch/powerpc/boot/dts/mpc8377_mds.dts 
> > +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts 
> > @@ -210,6 +210,20 @@ 
> >                       #interrupt-cells = <2>; 
> >                       reg = <700 100>; 
> >               }; 
> > + 
> > +             ipic-msi at 7c0 { 
> > +                     compatible = "fsl,ipic-msi"; 
> > +                     reg = <7c0 40>; 
> > +                     interrupts = < 43 8 
> > +                                    4  8 
> > +                                    51 8 
> > +                                    52 8 
> > +                                    56 8 
> > +                                    57 8 
> > +                                    58 8 
> > +                                    59 8 >; 
> > +                     interrupt-parent = < &ipic >; 
> > +             };
> 
> I'm not sure why the MSI needs a device node of its own.  What actual 
> piece of hardware is this representing?
> 

The IPIC MSI has its own registers which control the mask and ack of MSI
interrupt. Furthermore, IPIC MSI is the second level interrupt
coontorller which connected to IPIC, to compatible with IPIC OF routine
interface, we need a device node.

> -- 
> David Gibson                    | I'll have my music baroque, and my
> code 
> david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_
> _other_ 
>                                 | _way_ _around_! 
> http://www.ozlabs.org/~dgibson
> 

- Tony