[PATCH] qe_ic: Do a sync when masking interrupts.

[Segher Boessenkool]

> ll a sync tells you is that an I/O made it out of the CPU. The  
> problem is, there may be other places a write could get hung up.  
> For instance, sometimes devices sit behind a bridge with a write  
> FIFO. In such a scenario, you can't be sure a write has made it to  
> the device until you do a read to flush the FIFO.

It's not enough that a write made it to the device even -- you
have to make sure the device has acted on it.

> If you're trying to figure out the minimum thing to do (eieio,  
> sync, read-back, etc.) you have to understand what your system is  
> doing between the store and the bits going into the register.

What the system is doing, and also what exactly you want to
accomplish (what ordering and what completion you depend on).

> It may be that a sync is enough, but you won't know until you fully  
> understand the system's bus/bridge topolgy between the CPU and the  
> device.

If a sync after an MMIO write is enough, then (in almost all
cases) so is an eieio.


Segher