where to find explanation of CP "RISC controller trap registers"?

[Dan Malek]

On Sep 17, 2004, at 4:42 PM, Robert P. J. Day wrote:

>   it all looks fairly straightforward, except in a couple cases where 
> the CP RISC controller trap registers are set to, allegedly, enable 
> the traps to get to [the patch].

They are not generally documented.  As I have said in the past, along 
with
the microcode is also documentation that explains how to use the patch.
The documentation states the order of initialization of various 
undocumented
CPM locations/registers and the values to write.  You just do it.


	-- Dan