TEST: Sleep patch #4

Michael Schmitz schmitz at zirkon.biophys.uni-duesseldorf.de
Tue Nov 23 23:28:08 EST 2004

> It reads them from OF at boot. What do you mean by "freak out" ? the
> usual problem with those models where the display gets all fuzzy ? I'm
> not completely sure what's up, I tend to blame the panel power sequence
> nowadays ...

Just got a garbled display when waking up from sleep. That seems to
support your panel powerup idea. A second sleep/wake cycle fixed it.

Looking at radeon_base.c:radeon_screen_blank() (line 1045) we have:

                        val &= ~(LVDS_BL_MOD_EN);
                        val &= ~(LVDS_ON | LVDS_EN);
                        OUTREG(LVDS_GEN_CNTL, val);

Is there an OUTREG(LVDS_GEN_CNTL, val); missing before the udelay(100) ??

That's in the panel blank code, not the unblank code though. Doesn't seem
to hurt to put the OUTREG in.


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