some questions on new dual 1Gig G4's support?
benh at kernel.crashing.org
Sun Feb 3 23:04:26 EST 2002
>Thanks! I see you have hit the big time! The /. inerview article was
>great! Now I can say I actually know someone famous! ;-)
>One last question:
>The 7455 errata basically says to disable the L2 hardware prefetch engine
>(MSSCR0[L2PFE] = 0 when disabling the L1 data cache.
>It goes on to say that the L1 data cache may be disabled during cache
>flushing on some systems or be disabled upon startup.
>Do we disable L1 cache's during cache flushing? If so were should I be
>looking for this code to get the workaround in place?
I don't think we disable L1 except when changing L2CR value or when
going to sleep.
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