ieee1394 status

Daniel Berlin dan at
Sun May 6 02:09:50 EST 2001

Benjamin Herrenschmidt <benh at> writes:

> >You can say whether you want the following swapped  or not (in any
> >combination, they are just flags)
> >
> >1. selfid handling
> >2. reading
> >3. writing
> >
> >
> >Pismo needs 2 and 3 to work right.
> >Other OHCI on PPC (TI) need 1, 2, and 3.
> >Your titanium probably needs 2 and 3, since i believe it's based on the
> >uninorth, just a newer revision, right?
> The titanium is the same logic board as the Pismo (well, almost). The
> last TiPb I had a chance to play with had the exact same UniNorth revision
> as the Pismo.
> When you say you need byteswap on read & write, is this for data packets
> read/written to/from memory (DMA) or is this for datas you feed to
> (read from) a FIFO ? Just curious...

It's for the actual packet data in the third and fourth quadlets, at
least right now.  It's necessary because motherboard implementations
aren't required to support the byte swapping flag that normally takes
care of this. And the uninorth doesn't.
DMA is another issue altogether.
> >It'll be on the 1394 list in about 10 minutes.
> Is it against the 1394 CVS or will the current 2.4.4 1394 code work fine
> with your patch as well ?

It's against 1394 CVS, because that's what was easiest to diff against
(cvs diff -c3p, hand edit, done).
I always run your latest kernel, so i'm sure it works there too.

There are some 2.4 specific optimizations I made (use tasklets rather
than bottom halves, use a kmem_cache for packet allocation [
kmem_caches in 2.2 have some problems]) that i'd include if you want
to put it in the kernel.

> In that later case, I'll include your patch in my
> kernels.

> Ben.

"If you were going to shoot a mime, would you use a silencer?
"-Steven Wright

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