Altivec on 2.4.xx?

[Dan Malek]

Daniel Marmier wrote:

> If my understanding of Motorola's docs is correct, the only MPC8xx
> exception that has a valid DSISR setting is the implementation
> specific data TLB error interrupt

This is a PowerPC architecture definition. It isn't unique to the MPC8xx,
as I am obviously using a 7400 with Altivec here.

Having the common page fault handler is a good thing, we just have
to make sure we extract the information properly from the appropriate
register.

I thought there was more (than none :-) development happening with
Altivec on PowerPC Linux.  Maybe tiny test applications will work,
but my MPEG-2 decoder won't.

I'm just adding one instruction to the Instruction Exception handler
to mask the bit, so I will just check it in.


	-- Dan

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