something about storage attribute control(SAC) register

Alan Wang wung_y at
Fri Sep 3 17:44:06 EST 1999

    in PPC401GF, there is 4G addressing space. so in SAC register, each bit
control a block of 128M. But in pratice, embedded system do not have so many
memory. Even one bit of SAC register(128M) seems too big. does anyone know
why IBM design it like this? under the condition of no address translation
available, if 32-bit address pratical?


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