[PATCH v2 0/2] Add device tree for ASRock Rack ALTRAD8 BMC

[Andrew Jeffery]

Hi Rebecca,

On Wed, 2025-09-17 at 12:04 -0600, Rebecca Cran wrote:
> The ASRock Rack ALTRAD8 BMC is an Aspeed AST2500-based BMC for the
> ALTRAD8UD-1L2T and ALTRAD8UD2-1L2Q boards with an Ampere Altra
> processor. The BMC runs OpenBMC.
> 
> These patches add a device tree and binding for the BMC.
> 
> **Changes between v1 and v2**
> 
> - Reordered nodes to be in alphabetical order.
> - Removed status lines.
> - Fixed naming.
> 
> There are still several warnings from
> make CHECK_DTBS=y ARCH=arm W=1 aspeed/aspeed-bmc-asrock-altrad8.dtb

Thanks for checking!

> I believe the only one which is reporting an issue in my dts file (as opposed
> to included files) is the first, and that's because the code partition contains
> the TF-A and UEFI areas. I couldn't see a way to suppress it.
> 
> aspeed-bmc-asrock-altrad8.dts:578.16-581.6: Warning (unique_unit_address_if_enabled): /ahb/spi at 1e630000/flash at 0/partitions/code at 400000: duplicate unit-address (also used in node /ahb/spi at 1e630000/flash at 0/partitions/tfa at 400000)

It seems odd that the partitions intersect. Are the offsets correct? If
they are, can you add comments to the DTS discussing what's going on
there?

> aspeed-bmc-asrock-altrad8.dtb: /ahb/apb/memory-controller at 1e6e0000: failed to match any schema with compatible: ['aspeed,ast2500-sdram-edac']

*snip*

> aspeed-bmc-asrock-altrad8.dtb: gpio at 1c (nxp,pca9557): '#address-cells', '#size-cells', 'gpio at 0', 'gpio at 1', 'gpio at 2', 'gpio at 3', 'gpio at 4', 'gpio at 5', 'gpio at 6', 'gpio at 7' do not match any of the regexes: '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$', '^pinctrl-[0-9]+$'
> 	from schema $id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml#

This one needs fixing.

Cheers,

Andrew