[PATCH v6 4/6] arm64: dts: aspeed: Add initial AST2700 SoC device tree

[Ryan Chen]

> Subject: Re: [PATCH v6 4/6] arm64: dts: aspeed: Add initial AST2700 SoC device
> tree
> 
> > SoC0, referred to as the CPU die, contains a dual-core Cortex-A35
> > cluster and two Cortex-M4 cores, along with its own clock/reset
> > domains and high-speed peripheral set.
> 
> > SoC1, referred to as the I/O die, contains the Boot MCU and its own
> > clock/reset domains and low-speed peripheral set, and is responsible
> > for system boot and control functions.
> 
> So is the same .dtsi file shared by both systems? 

This .dtsi represents the Cortex-A35 view only and is not shared
with the Cortex-M4 or the Boot MCU side, since they are separate
32-bit and 64-bit systems running independent firmware.

> How do you partition devices
> so each CPU cluster knows it has exclusive access to which peripherals?

Before the system is fully brought up, Boot MCU configure hardware 
controllers handle the resource partitioning to ensure exclusive access.

> 
> Seems like a fun system to play core wars on.
> 
> 	Andrew