[PATCH 1/4] dt-bindings: mfd: aspeed: support for AST2700

Krzysztof Kozlowski krzk at kernel.org
Fri Aug 9 16:02:53 AEST 2024


On 09/08/2024 07:55, Ryan Chen wrote:
>> Subject: Re: [PATCH 1/4] dt-bindings: mfd: aspeed: support for AST2700
>>
>> On 08/08/2024 09:59, Ryan Chen wrote:
>>> Add compatible support for AST2700 clk, reset, pinctrl, silicon-id and
>>> example for AST2700 scu.
>>>
>>> Signed-off-by: Ryan Chen <ryan_chen at aspeedtech.com>
>>> ---
>>>  .../bindings/mfd/aspeed,ast2x00-scu.yaml      | 31
>> +++++++++++++++++--
>>>  1 file changed, 29 insertions(+), 2 deletions(-)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
>>> b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
>>> index 86ee69c0f45b..c0965f08ae8c 100644
>>> --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
>>> +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml
>>> @@ -21,6 +21,8 @@ properties:
>>>            - aspeed,ast2400-scu
>>>            - aspeed,ast2500-scu
>>>            - aspeed,ast2600-scu
>>> +          - aspeed,ast2700-scu0
>>> +          - aspeed,ast2700-scu1
>>
>> What are the differences between these two?
> 
> The next [PATCH 4/4] is scu driver that include ast2700-scu0 and ast2700-scu1
> CLK_OF_DECLARE_DRIVER(ast2700_soc0, "aspeed,ast2700-scu0", ast2700_soc0_clk_init);
> CLK_OF_DECLARE_DRIVER(ast2700_soc1, "aspeed,ast2700-scu1", ast2700_soc1_clk_init);

What are hardware differences? Entirely different devices?

> So I add these two.
> 
>>
>>>        - const: syscon
>>>        - const: simple-mfd
>>>
>>> @@ -30,10 +32,12 @@ properties:
>>>    ranges: true
>>>
>>>    '#address-cells':
>>> -    const: 1
>>> +    minimum: 1
>>> +    maximum: 2
>>>
>>>    '#size-cells':
>>> -    const: 1
>>> +    minimum: 1
>>> +    maximum: 2
>>>
>>>    '#clock-cells':
>>>      const: 1
>>> @@ -56,6 +60,8 @@ patternProperties:
>>>              - aspeed,ast2400-pinctrl
>>>              - aspeed,ast2500-pinctrl
>>>              - aspeed,ast2600-pinctrl
>>> +            - aspeed,ast2700-soc0-pinctrl
>>> +            - aspeed,ast2700-soc1-pinctrl
>>>
>>>      required:
>>>        - compatible
>>> @@ -76,6 +82,7 @@ patternProperties:
>>>                - aspeed,ast2400-silicon-id
>>>                - aspeed,ast2500-silicon-id
>>>                - aspeed,ast2600-silicon-id
>>> +              - aspeed,ast2700-silicon-id
>>>            - const: aspeed,silicon-id
>>>
>>>        reg:
>>> @@ -115,4 +122,24 @@ examples:
>>>              reg = <0x7c 0x4>, <0x150 0x8>;
>>>          };
>>>      };
>>> +  - |
>>> +    soc0 {
>>> +        #address-cells = <2>;
>>> +        #size-cells = <2>;
>>
>> That's the same example as previous, right? The drop, no need.
> 
> AST2700 is 64bits address mode platform, that the reason.
> So I add example for 64bits platform descript in dtsi
> I have to add soc0 to be address-cells and size-cells to be <2>
> Then I can define the register to be 64bits address and size.

That's trivial. Drop.

>>
>> Best regards,
>> Krzysztof
> 
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Maybe I am the intended recipient of your message, maybe not. I don't
want to have any legal questions regarding upstream, public
collaboration, thus probably I should just remove your messages.

Please talk with your IT that such disclaimers in open-source are not
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If you do not understand why, please also see:
https://www.youtube.com/live/fMeH7wqOwXA?si=GY7igfbda6vnjXlJ&t=835

If you need to go around company SMTP server, then consider using b4
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I will not respond to any other confidential emails. That's the last one
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Best regards,
Krzysztof



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