[PATCH v1 2/4] ARM: dts: aspeed-g6: Add SGPIO node.

[Steven Lee]

The 05/27/2021 09:27, Andrew Jeffery wrote:
> Hi Steven,
> 
> On Wed, 26 May 2021, at 19:16, Steven Lee wrote:
> > AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
> > with 80 pins.
> 
> Is there any chance the serial GPIO controllers can be explicitly 
> listed in the Memory Space Allocation Table of the datasheet? Currently 
> they're covered by the entry for "GPIO Controller (Parallel GPIO)" 
> which is listed as ranging from 0x1e780000-0x1e7807ff.
> 

I've forwarded your suggestion to designers.
Per the discussion with designers, they may change the
GPIO controller description of Memory Space Allocation Table to
"GPIO Controller (including Parallel and Serial GPIO)".

> Admittedly the details are listed in chapter 41 for the GPIO 
> Controller, but it would be handy to not have to dig.
> 
> > 
> > Signed-off-by: Steven Lee <steven_lee at aspeedtech.com>
> > ---
> >  arch/arm/boot/dts/aspeed-g6.dtsi | 32 ++++++++++++++++++++++++++++++++
> >  1 file changed, 32 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
> > index f96607b7b4e2..556ce9535c22 100644
> > --- a/arch/arm/boot/dts/aspeed-g6.dtsi
> > +++ b/arch/arm/boot/dts/aspeed-g6.dtsi
> > @@ -377,6 +377,38 @@
> >  				#interrupt-cells = <2>;
> >  			};
> >  
> > +			sgpiom0: sgpiom at 1e780500 {
> > +				#gpio-cells = <2>;
> > +				gpio-controller;
> > +				compatible = "aspeed,ast2600-sgpiom";
> > +				reg = <0x1e780500 0x100>;
> > +				interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> > +				max-ngpios = <128>;
> 
> I need to think more about this one.
> 
> Andrew