[RFC 2/7] pwm: Allow chips to support multiple PWMs.
Stephen Warren
swarren at nvidia.com
Wed Dec 21 09:32:52 EST 2011
Thierry Reding wrote at Tuesday, December 20, 2011 3:32 AM:
> This commit modifies the PWM core to support multiple PWMs per struct
> pwm_chip. It achieves this in a similar way to how gpiolib works, by
> allowing PWM ranges to be requested dynamically (pwm_chip.base == -1) or
> starting at a given offset (pwm_chip.base >= 0). A chip specifies how
Echoing my previous comment: >0 would be better than >=0 here.
> many PWMs it controls using the npwm member. Each of the functions in
> the pwm_ops structure gets an additional argument that specified the PWM
> number (it can be converted to a per-chip index by subtracting the
> chip's base).
I think it'd be much more convenient for drivers if the PWM core passed
the device-relative PWM ID to the driver functions instead of the global
PWM ID; the common case is going to be for the driver to want to index
into some local array using the value, which means all drivers will have
to subtract the chip base. I doubt many drivers will care about the global
ID at all, and if they do, they can add the base back on.
> The total maximum number of PWM devices is currently fixed to 64, but
> can easily be made configurable via Kconfig.
GPIO (and IRQ?) have static sized arrays for this kind of purpose too,
and I'm pretty sure I've seen discussions that this was a mistake, or
at least something that will hopefully be reworked. pinctrl was similar,
but it was requested this be reworked, and now I think the pin ID ->
pin descriptor table is a radix tree.
In other words, can you do away with NR_PWM, and make it completely
dynamic?
--
nvpublic
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