[Cbe-oss-dev] [patch 11/11] powerpc/cell: Add DMA_ATTR_STRONG_ORDERING dma attribute and use in IOMMU code
Arnd Bergmann
arnd at arndb.de
Mon Jul 7 01:15:54 EST 2008
On Sunday 06 July 2008, Benjamin Herrenschmidt wrote:
> I need to look closely at what the various bridge settings are. Drivers
> do expect DMA requests from one device to stay in order, at least up to
> what's defined in the PCI spec, which is pretty much fully ordered
> unless those devices set the PCIe (or X) relaxed ordering attribute.
> However, AFAIK, Axon doesn't convey that sort of ordering attributes
> from incoming transactions between the PCIe segment and the PLB5.
Yes, it would be very helpful if you can look into this a bit more.
The Axon specification is particularly confusing in this regard and
even though everyone I have asked so far told us that it's totally
fine, an extra person with more insight in the complete picture looking
into this would be good.
Arnd <><
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