[Cbe-oss-dev] [PATCH 3/3] spufs context switch - fix interrupt routing

[Benjamin Herrenschmidt]

On Tue, 2008-04-22 at 23:00 -0300, Luke Browning wrote:
> 
> Interrupt routing must be programmed when mfc queue is in a quiescent state, 
> either empty or stopped with no pending interrupts.  Otherwise, multiple
> cpus could be interrupted for a given spu.  This is problematic for several
> reasons.  The state of the mfc queue, the dma restart, needs to be performed
> after virtual memory operations take place.  There is nothing to prevent 
> concurrent exception handling in the slih and the thread level.  Also,
> there is only one set of fields for dealing with exceptions in the csa, so
> you could have exception data being over-written while it is being processed.
> Many things could go wrong. 
> 
> Signed-Off-By: Luke Browning <lukebrowning at us.ibm.com>

While I agree that it's more "sane" to only change the routing while the
MFC is quiescent, I fail to understand the problems you claim it would
trigger if not.

First, the interrupt handler cannot be run on more than one CPU at once,
that's guaranteed by the interrupt core.

Then, there is definitely something that prevents concurrent handling of
exceptions though I don't totally understand why you mean by "slih" vs.
"thread level" here. 

Finally, spurrious interrupts shouldn't be much of a problem as long as
the MFC provides correct status bits anyway.

I also don't see how one would overwrite exception data as only hash
misses can write there and there cannot be two pending at once. What do
I miss here ?

Ben.