[Cbe-oss-dev] [RFC/PATCH] adding support for direct MBX interrupt on Axon based platform.

Benjamin Herrenschmidt benh at kernel.crashing.org
Sat May 19 13:15:46 EST 2007


On Fri, 2007-05-18 at 18:32 +0200, Jean-Christophe Dubois wrote:

> > I wouldn't really mind using a different class here if that's the only
> > way we can really tell, even if that is not in the spirit of the CBE
> > architecture.
> 
> Well that might be a solution but I didn't want to go this way because it was 
> diverging from the CBE architecture document. Now if we go this route, we 
> will have to make sure there is no collision with some already valid 
> interrupts. I guess the unit should set the interrupt apart already.
> 
> We could also factorise somehow the interrupt priority in the hw interrupt 
> number. But I guess that would make a lot of changes.

I removed the priority on purpose from the IRQ number. It has nothing to
do there. We might want to play with priorities for other reasons
without affecting the numbering.

I think changing the class is the way to go. I'll ask around to see if
STI folks consider that an acceptable solution. I don't think anything
will emit an interrupt of a different class that has the source set to
one of the IOIFs when that IOIF is used with a southbridge.

Ben.





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