[Cbe-oss-dev] [RFC/PATCH] adding support for direct MBX interrupt on Axon based platform.

Benjamin Herrenschmidt benh at kernel.crashing.org
Sat May 19 13:07:07 EST 2007


On Fri, 2007-05-18 at 16:49 +0200, Jean-Christophe Dubois wrote:
> The programmable parts for a C3PO interrupt are: class, destination
> node, 
> destination thread on the node and priority. The SLOF firmware just
> change 
> the prirority for the 4 possible interrupts generated by the C3PO
> (MPIC 
> machine check = 0, MPIC critical = 4, direct MBX = 8, MPIC normal =
> c).
> 
> According to the Cell manual, class = 2 is correct for external
> interrupts. 
> Class 0 and 1 are reserved for internal SPU/DMA error/translation
> cases. 3 is 
> reserved. 

I think we can afford to not care here and use a different class... but
I'll ask Mike Day to be sure...

I've been avoiding to encode the priority in the interrupt numbers on
purpose to avoid those problems specifically.

If we're going to change that, we'll have to figure out a smart way to
do it in a backward compatible way. I don't want a hack in the iic like
you did.

Ben.





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