[Cbe-oss-dev] [patch 3/5] cell: updated driver for DDR2 memory on AXON

[Christophe Lamoureux]

> +	BUG_ON(!bank);
> +
> +	if (irq == bank->irq_correctable) {
> +		dev_err(&device->dev, "Correctable memory error occured\n");
> +		bank->ecc_counter++;
It's minor but shouldn't the interrupt be acknowledged on the axon Memory Controler device here ? 
The goal is to reset the level of the interrupt line between the Memory Controler and the MPIC, so 
being able to catch the next correctable ecc errors ( this driver has registered the irq on trigger rising  
and the axon MC specs looks to say the interrupt for the MC is level only )  

> +		return IRQ_HANDLED;
> +	} else if (irq == bank->irq_uncorrectable) {

Christophe.