[Cbe-oss-dev] [patch 04/16] Common Core of the Axon driver

[Benjamin Herrenschmidt]

On Fri, 2007-05-25 at 10:47 +0200, Jean-Christophe Dubois wrote:
> > What does this do that can't be done by the firmware?
> 
> This is common code used on the host and the Cell. On the host you are
> getting 
> 2 x 128M PCI Bars to MAP the 1TB Axon memory map. So you need to
> reprogram 
> the mapping on the fly depending on you target address on the PLB when
> doing 
> PIO. We don't do much PIO (we try to use the DMA as much as possible)
> but 
> when required you need the support.

What locking do you provide to that ? I would have instead creating a
"window" object to access PIO that is just a nop on cell side and that
you can get/put.

Ben.