[Cbe-oss-dev] [RFC 1/9] AXON - common driver core

Jean-Christophe Dubois jdubois at mc.com
Fri Dec 29 02:39:31 EST 2006

On Thursday 28 December 2006 00:10, Benjamin Herrenschmidt wrote:
> On Fri, 2006-12-22 at 17:38 +0100, Jean-Christophe Dubois wrote:
> > Same reason ...
> >
> > In addition the host side of thing (opteron based for example) has no
> > OF tree
> > to play with. So things need to be hardcoded a bit. Note that these
> > are Axon
> > internal addresses and should always be valid (from the host or the
> > Cell).
> I'd rather have one of the BARs at reset time point to a bit of DDR
> memory that contains a description of where things are that the host can
> use.

When the host access the CAB the first time Linux is not necessarily running 
on the Cell yet. Actually one boot scenario is the host pushing the Linux 
binary in XDR (through PCI-E) and the CAB booting from it. So there is not 
necessarily anybody to negotiate with at first. On the other hand the CAB 
could be already booted to linux (from network or flash). There is nothing 
hardcoded ...

Most resource on the PLB are very sharable. XDR, DDR, DMAX, MBX, ... are all 
usable both from PCI-E and Cell. There is certainly a little bit of 
negociation to do to agree on DMA channel, who owns memory ...


> Ben.

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