[Skiboot] [PATCH v3 3/6] plat/qemu: add support for Power11 platform
Mahesh J Salgaonkar
mahesh at linux.ibm.com
Tue Feb 18 17:29:16 AEDT 2025
On 2025-02-18 10:36:03 Tue, Nicholas Piggin wrote:
> On Thu Feb 6, 2025 at 11:55 PM AEST, Mahesh Salgaonkar wrote:
> > From: Aditya Gupta <adityag at linux.ibm.com>
> >
> > Add support for QEMU simulator for Power11 when it starts supporting
> > "qemu,powernv11" machines.
> >
> > Signed-off-by: Aditya Gupta <adityag at linux.ibm.com>
> > Signed-off-by: Mahesh Salgaonkar <mahesh at linux.ibm.com>
> > ---
> > Change in v3:
> > - Add helper function to get proc_gen number
> > - Print unknown processor detected in case of -ve proc_gen number
> > ---
> > core/chip.c | 1 +
> > hw/psi.c | 2 ++
> > hw/xscom.c | 29 +++++++++++++++++++++++------
> > platforms/qemu/qemu.c | 23 +++++++++++++++++++++++
> > 4 files changed, 49 insertions(+), 6 deletions(-)
> >
> > diff --git a/core/chip.c b/core/chip.c
> > index 078f658a29..2df35f3ff6 100644
> > --- a/core/chip.c
> > +++ b/core/chip.c
> > @@ -189,6 +189,7 @@ void init_chips(void)
> > } else if (dt_node_is_compatible(dt_root, "qemu,powernv") ||
> > dt_node_is_compatible(dt_root, "qemu,powernv8") ||
> > dt_node_is_compatible(dt_root, "qemu,powernv9") ||
> > + dt_node_is_compatible(dt_root, "qemu,powernv11") ||
> > dt_find_by_path(dt_root, "/qemu")) {
> > proc_chip_quirks |= QUIRK_QEMU | QUIRK_NO_DIRECT_CTL | QUIRK_NO_RNG;
> > prlog(PR_NOTICE, "CHIP: Detected QEMU simulator\n");
> > diff --git a/hw/psi.c b/hw/psi.c
> > index 307c30b24b..50c12e94d3 100644
> > --- a/hw/psi.c
> > +++ b/hw/psi.c
> > @@ -1042,6 +1042,8 @@ static bool psi_init_psihb(struct dt_node *psihb)
> > psi = psi_probe_p9(chip, base);
> > else if (dt_node_is_compatible(psihb, "ibm,power10-psihb-x"))
> > psi = psi_probe_p10(chip, base);
> > + else if (dt_node_is_compatible(psihb, "ibm,power11-psihb-x"))
> > + psi = psi_probe_p10(chip, base);
> > else {
> > prerror("PSI: Unknown processor type\n");
> > return false;
> > diff --git a/hw/xscom.c b/hw/xscom.c
> > index ca8ebe557e..2c0733df8a 100644
> > --- a/hw/xscom.c
> > +++ b/hw/xscom.c
> > @@ -841,11 +841,26 @@ int64_t xscom_read_cfam_chipid(uint32_t partid, uint32_t *chip_id)
> > return rc;
> > }
> >
> > +static inline int8_t get_proc_gen_num(void)
> > +{
> > + switch (proc_gen) {
> > + case proc_gen_p9:
> > + return 9;
> > + case proc_gen_p10:
> > + return 10;
> > + case proc_gen_p11:
> > + return 11;
> > + default:
> > + return -1;
> > + }
> > +}
> > +
> > /* The recipe comes from the p10_getecid hardware procedure */
> > static uint8_t xscom_get_ec_rev(struct proc_chip *chip)
> > {
> > uint64_t ecid2 = 0;
> > int8_t rev;
> > + int8_t proc_gen_num;
> > const int8_t *table;
> > /* 0 1 2 3 4 5 6 7 */
> > const int8_t p9table[8] = {0, 1, -1, 2, -1, -1, -1, 3};
> > @@ -876,11 +891,13 @@ static uint8_t xscom_get_ec_rev(struct proc_chip *chip)
> > if (rev < 0)
> > return 0;
> >
> > - prlog(PR_INFO, "P%d DD%i.%i%d detected\n",
> > - proc_gen == proc_gen_p9 ? 9 : 10,
> > - 0xf & (chip->ec_level >> 4),
> > - chip->ec_level & 0xf,
> > - rev);
> > + proc_gen_num = get_proc_gen_num();
> > + if (proc_gen_num < 0)
> > + prlog(PR_INFO, "Unknown Power processor detected\n");
> > + else
> > + prlog(PR_INFO, "P%d DD%i.%i%d detected\n", proc_gen_num,
> > + 0xf & (chip->ec_level >> 4),
> > + chip->ec_level & 0xf, rev);
> >
> > return rev;
> > }
> > @@ -980,7 +997,7 @@ void xscom_init(void)
> > const char *chip_name;
> > static const char *chip_names[] = {
> > "UNKNOWN", "P8E", "P8", "P8NVL", "P9N", "P9C", "P9P",
> > - "P10",
> > + "P10", "P11",
> > };
> >
> > chip = get_chip(gcid);
>
> Shouldn't the psi.c and xscom.c changes go into patch 1? They aren't
> adding anything particularly for QEMU AFAIKS.
Yes you are right. I will move psi.c and xscom.c hunks to patch 1.
>
> Otherwise looks okay.
>
> Reviewed-by: Nicholas Piggin <npiggin at gmail.com>
Thanks for your review.
-Mahesh.
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