[Skiboot] [PATCH 4/4] hw/occ: Endian fixes

[Nicholas Piggin]

Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
---
 hw/occ.c | 60 ++++++++++++++++++++++++++++++++------------------------
 1 file changed, 34 insertions(+), 26 deletions(-)

diff --git a/hw/occ.c b/hw/occ.c
index f7d8241c4..5161532e6 100644
--- a/hw/occ.c
+++ b/hw/occ.c
@@ -184,7 +184,7 @@ struct opal_command_buffer {
 	u8 request_id;
 	u8 cmd;
 	u8 spare;
-	u16 data_size;
+	__be16 data_size;
 	u8 data[MAX_OPAL_CMD_DATA_LENGTH];
 } __packed;
 
@@ -224,7 +224,7 @@ struct occ_response_buffer {
 	u8 request_id;
 	u8 cmd;
 	u8 status;
-	u16 data_size;
+	__be16 data_size;
 	u8 data[MAX_OCC_RSP_DATA_LENGTH];
 } __packed;
 
@@ -274,10 +274,10 @@ struct occ_dynamic_data {
 	u8 quick_pwr_drop;
 	u8 pwr_shifting_ratio;
 	u8 pwr_cap_type;
-	u16 hard_min_pwr_cap;
-	u16 max_pwr_cap;
-	u16 cur_pwr_cap;
-	u16 soft_min_pwr_cap;
+	__be16 hard_min_pwr_cap;
+	__be16 max_pwr_cap;
+	__be16 cur_pwr_cap;
+	__be16 soft_min_pwr_cap;
 	u8 pad[110];
 	struct opal_command_buffer cmd;
 	struct occ_response_buffer rsp;
@@ -1248,6 +1248,7 @@ static int write_occ_cmd(struct cmd_interface *chip)
 {
 	struct opal_command_buffer *cmd = chip->cmd;
 	enum occ_cmd ocmd = chip->cdata->cmd;
+	u16 data_size;
 
 	if (!chip->retry && occ_in_progress(chip)) {
 		chip->cmd_in_progress = false;
@@ -1257,8 +1258,9 @@ static int write_occ_cmd(struct cmd_interface *chip)
 	cmd->flag = chip->rsp->flag = 0;
 	cmd->cmd = occ_cmds[ocmd].cmd_value;
 	cmd->request_id = chip->request_id++;
-	cmd->data_size = occ_cmds[ocmd].cmd_size;
-	memcpy(&cmd->data, chip->cdata->data, cmd->data_size);
+	data_size = occ_cmds[ocmd].cmd_size;
+	cmd->data_size = cpu_to_be16(data_size);
+	memcpy(&cmd->data, chip->cdata->data, data_size);
 	cmd->flag = OPAL_FLAG_CMD_READY;
 
 	schedule_timer(&chip->timeout,
@@ -1298,9 +1300,13 @@ out:
 static inline bool sanity_check_opal_cmd(struct opal_command_buffer *cmd,
 					 struct cmd_interface *chip)
 {
-	return ((cmd->cmd == occ_cmds[chip->cdata->cmd].cmd_value) &&
-		(cmd->request_id == chip->request_id - 1) &&
-		(cmd->data_size == occ_cmds[chip->cdata->cmd].cmd_size));
+	if (cmd->cmd != occ_cmds[chip->cdata->cmd].cmd_value)
+		return false;
+	if (cmd->request_id != chip->request_id - 1)
+		return false;
+	if (be16_to_cpu(cmd->data_size) != occ_cmds[chip->cdata->cmd].cmd_size)
+		return false;
+	return true;
 }
 
 static inline bool check_occ_rsp(struct opal_command_buffer *cmd,
@@ -1419,7 +1425,7 @@ static void handle_occ_rsp(uint32_t chip_id)
 
 	if (rsp->cmd == occ_cmds[OCC_CMD_SELECT_SENSOR_GROUP].cmd_value &&
 	    rsp->status == OCC_RSP_SUCCESS)
-		chip->enabled_sensor_mask = *(u16 *)chip->cdata->data;
+		chip->enabled_sensor_mask = be16_to_cpu(*(__be16 *)chip->cdata->data);
 
 	chip->cmd_in_progress = false;
 	queue_occ_rsp_msg(chip->token, read_occ_rsp(chip->rsp));
@@ -1579,16 +1585,16 @@ int occ_get_powercap(u32 handle, u32 *pcap)
 
 	switch (powercap_get_attr(handle)) {
 	case POWERCAP_OCC_SOFT_MIN:
-		*pcap = ddata->soft_min_pwr_cap;
+		*pcap = be16_to_cpu(ddata->soft_min_pwr_cap);
 		break;
 	case POWERCAP_OCC_MAX:
-		*pcap = ddata->max_pwr_cap;
+		*pcap = be16_to_cpu(ddata->max_pwr_cap);
 		break;
 	case POWERCAP_OCC_CUR:
-		*pcap = ddata->cur_pwr_cap;
+		*pcap = be16_to_cpu(ddata->cur_pwr_cap);
 		break;
 	case POWERCAP_OCC_HARD_MIN:
-		*pcap = ddata->hard_min_pwr_cap;
+		*pcap = be16_to_cpu(ddata->hard_min_pwr_cap);
 		break;
 	default:
 		*pcap = 0;
@@ -1598,7 +1604,7 @@ int occ_get_powercap(u32 handle, u32 *pcap)
 	return OPAL_SUCCESS;
 }
 
-static u16 pcap_cdata;
+static __be16 pcap_cdata;
 static struct opal_occ_cmd_data pcap_data = {
 	.data		= (u8 *)&pcap_cdata,
 	.cmd		= OCC_CMD_SET_POWER_CAP,
@@ -1626,14 +1632,14 @@ int __attribute__((__const__)) occ_set_powercap(u32 handle, int token, u32 pcap)
 	chip = get_chip(chips[i].chip_id);
 	ddata = get_occ_dynamic_data(chip);
 
-	if (pcap == ddata->cur_pwr_cap)
+	if (pcap == be16_to_cpu(ddata->cur_pwr_cap))
 		return OPAL_SUCCESS;
 
-	if (pcap && (pcap > ddata->max_pwr_cap ||
-	    pcap < ddata->soft_min_pwr_cap))
+	if (pcap && (pcap > be16_to_cpu(ddata->max_pwr_cap) ||
+	    pcap < be16_to_cpu(ddata->soft_min_pwr_cap)))
 		return OPAL_PARAMETER;
 
-	pcap_cdata = pcap;
+	pcap_cdata = cpu_to_be16(pcap);
 	return opal_occ_command(&chips[i], token, &pcap_data);
 };
 
@@ -1738,7 +1744,7 @@ enum occ_sensor_limit_group {
 	OCC_SENSOR_LIMIT_GROUP_JOB_SCHED	= 0x40,
 };
 
-static u32 sensor_limit;
+static __be32 sensor_limit;
 static struct opal_occ_cmd_data slimit_data = {
 	.data		= (u8 *)&sensor_limit,
 	.cmd		= OCC_CMD_CLEAR_SENSOR_DATA,
@@ -1764,11 +1770,11 @@ int occ_sensor_group_clear(u32 group_hndl, int token)
 	if (!(*chips[i].valid))
 		return OPAL_HARDWARE;
 
-	sensor_limit = limit << 24;
+	sensor_limit = cpu_to_be32(limit << 24);
 	return opal_occ_command(&chips[i], token, &slimit_data);
 }
 
-static u16 sensor_enable;
+static __be16 sensor_enable;
 static struct opal_occ_cmd_data sensor_mask_data = {
 	.data		= (u8 *)&sensor_enable,
 	.cmd		= OCC_CMD_SELECT_SENSOR_GROUP,
@@ -1805,8 +1811,10 @@ int occ_sensor_group_enable(u32 group_hndl, int token, bool enable)
 	else if (!enable && !(type & chips[i].enabled_sensor_mask))
 		return OPAL_SUCCESS;
 
-	sensor_enable = enable ? type | chips[i].enabled_sensor_mask :
-				~type & chips[i].enabled_sensor_mask;
+	if (enable)
+		sensor_enable = cpu_to_be16(type | chips[i].enabled_sensor_mask);
+	else
+		sensor_enable = cpu_to_be16(~type & chips[i].enabled_sensor_mask);
 
 	return opal_occ_command(&chips[i], token, &sensor_mask_data);
 }
-- 
2.45.2