[Skiboot] [PATCH] xive: Fix NSR value when dumping the state of thread context

[Dan Horák]

On Tue, 31 May 2022 15:46:33 +0200
Frederic Barrat <fbarrat at linux.ibm.com> wrote:

> There's no reason to skip 2 bits when printing the Notification Source
> Register (NSR) of any thread context ring. So it's got to be a silly
> mistake and we should shift by 56 bits and not 58 :-)

makes sense :-)

Reviewed-by: Dan Horák <dan at danny.cz>


		Dan
 
> Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>
> ---
>  hw/xive.c  | 2 +-
>  hw/xive2.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/xive.c b/hw/xive.c
> index 34b92f1e..60552763 100644
> --- a/hw/xive.c
> +++ b/hw/xive.c
> @@ -4971,7 +4971,7 @@ static int64_t opal_xive_dump_tm(uint32_t offset, const char *n, uint32_t pir)
>  	      " W2       W3\n", pir);
>  	prlog(PR_INFO, "CPU[%04x]: %02x  %02x   %02x  %02x    %02x   "
>  	       "%02x  %02x  %02x   %08x %08x\n", pir,
> -	      (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
> +	      (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
>  	      (uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff,
>  	      (uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff,
>  	      (uint8_t)(v0 >>  8) & 0xff, (uint8_t)(v0      ) & 0xff,
> diff --git a/hw/xive2.c b/hw/xive2.c
> index ea55423b..8e2a1f2d 100644
> --- a/hw/xive2.c
> +++ b/hw/xive2.c
> @@ -4464,7 +4464,7 @@ static int64_t opal_xive_dump_tm(uint32_t offset, const char *n, uint32_t pir)
>  	      " W2       W3\n", pir);
>  	prlog(PR_INFO, "CPU[%04x]: %02x  %02x   %02x  %02x    %02x   "
>  	       "%02x  %02x  %02x   %08x %08x\n", pir,
> -	      (uint8_t)(v0 >> 58) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
> +	      (uint8_t)(v0 >> 56) & 0xff, (uint8_t)(v0 >> 48) & 0xff,
>  	      (uint8_t)(v0 >> 40) & 0xff, (uint8_t)(v0 >> 32) & 0xff,
>  	      (uint8_t)(v0 >> 24) & 0xff, (uint8_t)(v0 >> 16) & 0xff,
>  	      (uint8_t)(v0 >>  8) & 0xff, (uint8_t)(v0      ) & 0xff,
> -- 
> 2.35.3
> 
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