[Skiboot] [PATCH 6/6] core/pci: Go through a fundamental reset on hotplug

[Frederic Barrat]

This patch triggers a fundamental reset when hotplugging a slot on P9
and P10. It cleans up the host state and has the proper workarounds to
train correctly and have a stable link.

Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>
---
 core/pci-opal.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/core/pci-opal.c b/core/pci-opal.c
index aa375c6a..3cd354a2 100644
--- a/core/pci-opal.c
+++ b/core/pci-opal.c
@@ -811,12 +811,19 @@ out:
 	phb_unlock(phb);
 }
 
-static bool training_needed(struct pci_slot *slot)
+static bool reset_needed(struct pci_slot *slot)
 {
 	struct phb *phb = slot->phb;
 	struct pci_device *pd = slot->pd;
 
-	/* only for opencapi slots for now */
+	/*
+	 * On P9 and P10, we go trough freset. The device is powering
+	 * on and doesn't need it but on the host side, it's required
+	 * to have the link train correctly
+	 */
+	if (phb->phb_type == phb_type_pcie_v4)
+		return true;
+	/* opencapi slots */
 	if (!pd && phb->phb_type == phb_type_npu_v2_opencapi)
 		return true;
 	return false;
@@ -831,7 +838,7 @@ static void wait_for_link_up_and_rescan(struct pci_slot *slot)
 	 * fundamental reset. Other slots also need to be tested for
 	 * readiness
 	 */
-	if (training_needed(slot)) {
+	if (reset_needed(slot)) {
 		pci_slot_set_state(slot, PCI_SLOT_STATE_NORMAL);
 		rc = slot->ops.freset(slot);
 		if (rc < 0) {
-- 
2.31.1