[Skiboot] [PATCH 34/61] hw/phb5: Add initial support

Vasant Hegde hegdevasant at linux.vnet.ibm.com
Thu Jul 22 19:37:01 AEST 2021


On 7/21/21 8:10 PM, Frederic Barrat wrote:
> 
> 
>> diff --git a/hw/phb4.c b/hw/phb4.c
>> index 31f9fa250..033f08e6c 100644
>> --- a/hw/phb4.c
>> +++ b/hw/phb4.c
> 
>> @@ -4979,9 +5014,12 @@ static void phb4_init_ioda3(struct phb4 *p)
>>       /* Init_24 - CRW Base Address Reg */
>>       /* See enable_capi_mode() */
>> -    /* Init_25 - ASN Compare/Mask */
>> -    out_be64(p->regs + PHB_ASN_CMPM, ((u64)ASNIND << 48) |
>> -         ((u64)ASNMASK << 32) | PHB_ASN_CMPM_ENABLE);
>> +    if (is_phb4()) {
>> +        /* TODO (clg): unused on P10 */
>> +        /* Init_25 - ASN Compare/Mask */
>> +        out_be64(p->regs + PHB_ASN_CMPM, ((u64)ASNIND << 48) |
>> +             ((u64)ASNMASK << 32) | PHB_ASN_CMPM_ENABLE);
>> +    }
> 
> 
> We can drop the TODO comment, the code is correct as is. The "ASN compare/mask" 
> register is for PCI tunneled operations, which are specific to P9.
> 
> 
> 
>> @@ -5976,8 +6072,11 @@ static void phb4_probe_stack(struct dt_node *stk_node, 
>> uint32_t pec_index,
>>       }
>>       /* Clear errors in PFIR and NFIR */
>> -    xscom_write(gcid, pci_stack + XPEC_PCI_STK_PCI_FIR, 0);
>> -    xscom_write(gcid, nest_stack + XPEC_NEST_STK_PCI_NFIR, 0);
>> +    if (is_phb4()) {
>> +        /* TODO (clg): unused on P10 */
>> +        xscom_write(gcid, pci_stack + XPEC_PCI_STK_PCI_FIR, 0);
>> +        xscom_write(gcid, nest_stack + XPEC_NEST_STK_PCI_NFIR, 0);
>> +    }
> 
> 
> We actually need this for phb4 and 5. I've clarified it with Cedric (aka clg). 
> The if statement was to quiet a slightly overzealous warning in simics.

Thanks Fred for the review and fix :-)  I will include your fix in v2.

-Vasant





More information about the Skiboot mailing list