[Skiboot] [PATCH 47/61] xive/p10: Tune max_entries_in_modified when split_mode is on

[Vasant Hegde]

From: Cédric Le Goater <clg at kaod.org>

This reduces the number of entries currently modified in the ESB cache.

Signed-off-by: Cédric Le Goater <clg at kaod.org>
Signed-off-by: Vasant Hegde <hegdevasant at linux.vnet.ibm.com>
---
 hw/xive2.c           | 1 +
 include/xive2-regs.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/hw/xive2.c b/hw/xive2.c
index d9894a071..1f08ddef6 100644
--- a/hw/xive2.c
+++ b/hw/xive2.c
@@ -1627,6 +1627,7 @@ static void xive_config_esb_cache(struct xive *x)
 
 	if (xive_has_cap(x, CQ_XIVE_CAP_PHB_PQ_DISABLE)) {
 		val |= VC_ESBC_CFG_SPLIT_MODE | VC_ESBC_CFG_HASH_ARRAY_ENABLE;
+		val = SETFIELD(VC_ESBC_CFG_MAX_ENTRIES_IN_MODIFIED, val, 0xE);
 		xive_dbg(x, "ESB cache configured with split mode "
 			 "and hash array. VC_ESBC_CFG=%016llx\n", val);
 	} else
diff --git a/include/xive2-regs.h b/include/xive2-regs.h
index c2ed265f6..1f7a3e721 100644
--- a/include/xive2-regs.h
+++ b/include/xive2-regs.h
@@ -233,6 +233,7 @@
 #define	 VC_ESBC_CFG_HASH_ARRAY_ENABLE		PPC_BIT(40)
 #define	 VC_ESBC_CFG_HASH_STORE_MODE		PPC_BITMASK(41,42)
 #define	 VC_ESBC_CFG_SPLIT_MODE			PPC_BIT(56)
+#define	 VC_ESBC_CFG_MAX_ENTRIES_IN_MODIFIED	PPC_BITMASK(59,63)
 
 /* EASC flush control register */
 #define X_VC_EASC_FLUSH_CTRL			0x160
-- 
2.31.1