[Skiboot] [PATCH] phb4/5: Fix printing of device secondary status register.

[Frederic Barrat]

On 09/02/2021 09:45, Mahesh Salgaonkar wrote:
> The commit e73cf72d1f97 ("phb4: make endian-clean") accidently missed
> printing correct value for PCI device secondary status register.
> 
> [ 1654.399387394,3] PHB#0033[3:3]:             devCmdStatus = 00100107
> [ 1654.399389575,3] PHB#0033[3:3]:             devSecStatus = 00100107
> 
> after this patch:
> [ 1620.415289504,3] PHB#0033[3:3]:             devCmdStatus = 00100107
> [ 1620.415291622,3] PHB#0033[3:3]:             devSecStatus = 00002000
> 
> Fixes: e73cf72d ("phb4: make endian-clean")
> Signed-off-by: Mahesh Salgaonkar <mahesh at linux.ibm.com>
> ---
>   hw/phb4.c |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/phb4.c b/hw/phb4.c
> index edbcdb2179..2cac8d99cc 100644
> --- a/hw/phb4.c
> +++ b/hw/phb4.c
> @@ -1867,7 +1867,7 @@ static void phb4_read_phb_status(struct phb4 *p,
>   	phb4_pcicfg_read32(&p->phb, 0, PCI_CFG_CMD, &__32);
>   	stat->devCmdStatus = cpu_to_be32(__32);
>   	phb4_pcicfg_read16(&p->phb, 0, PCI_CFG_SECONDARY_STATUS, &__16);
> -	stat->devSecStatus = cpu_to_be32(__32);
> +	stat->devSecStatus = cpu_to_be32(__16);


"cpu_to_be32(__16)" reads like something is wrong but I think that's 
actually correct considering the size of stat->devSecStatus.

Reviewed-by: Frederic Barrat <fbarrat at linux.ibm.com>

   Fred


>   
>   	/* Grab a bunch of AER regs */
>   	phb4_pcicfg_read32(&p->phb, 0, p->aercap + PCIECAP_AER_RERR_STA, &__32);
> 
> 
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