[Skiboot] [PATCH v2 37/59] psi/p10: Introduce xive2_source_mask()

[Vasant Hegde]

From: Cédric Le Goater <clg at kaod.org>

Commit fa161cd89fbf ("hw/psi-p9: Mask OPAL-owned LSIs without
handlers") introduced xive_source_mask(). Do the same for P10.

Signed-off-by: Cédric Le Goater <clg at kaod.org>
Signed-off-by: Vasant Hegde <hegdevasant at linux.vnet.ibm.com>
---
 hw/psi.c       | 11 ++++++++++-
 hw/xive2.c     |  7 +++++++
 include/xive.h |  2 ++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/hw/psi.c b/hw/psi.c
index 291422539..e9b8e2ea7 100644
--- a/hw/psi.c
+++ b/hw/psi.c
@@ -564,7 +564,16 @@ static void psi_p9_mask_unhandled_irq(struct irq_source *is, uint32_t isn)
 	 * have a handler for the interrupt then it needs to be masked to
 	 * prevent the IRQ from locking up the thread which handles it.
 	 */
-	xive_source_mask(is, isn);
+	switch (proc_gen) {
+	case proc_gen_p9:
+		xive_source_mask(is, isn);
+		break;
+	case proc_gen_p10:
+		xive2_source_mask(is, isn);
+		return;
+	default:
+		assert(false);
+	}
 
 }
 
diff --git a/hw/xive2.c b/hw/xive2.c
index cba050fa1..f565be1fd 100644
--- a/hw/xive2.c
+++ b/hw/xive2.c
@@ -2532,6 +2532,13 @@ static char *xive_source_name(struct irq_source *is, uint32_t isn)
 	return s->orig_ops->name(is, isn);
 }
 
+void xive2_source_mask(struct irq_source *is, uint32_t isn)
+{
+	struct xive_src *s = container_of(is, struct xive_src, is);
+
+	xive_update_irq_mask(s, isn - s->esb_base, true);
+}
+
 static const struct irq_source_ops xive_irq_source_ops = {
 	.interrupt = xive_source_interrupt,
 	.attributes = xive_source_attributes,
diff --git a/include/xive.h b/include/xive.h
index faaef2aeb..8d5fbeddb 100644
--- a/include/xive.h
+++ b/include/xive.h
@@ -91,6 +91,8 @@ uint64_t xive2_get_esb_base(uint32_t girq);
 void xive2_cpu_callin(struct cpu_thread *cpu);
 void *xive2_get_trigger_port(uint32_t girq);
 
+void xive2_source_mask(struct irq_source *is, uint32_t isn);
+
 void xive2_cpu_reset(void);
 void xive2_late_init(void);
 
-- 
2.31.1