[Skiboot] [PATCH 3/5] hw/phb4: Don't disable TXE(12) interrupt if on P9 DD2.0

[Oliver O'Halloran]

Commit 7dbf80d1db45 ("phb4: Generate checkstop on AIB ECC corr/uncorr
for DD2.0 parts") changed the PHB inits so that on DD2.0 TXE error bit
12 would cause a checkstop. The patch also changes the
TXE_ERR_IRQ_ENABLE settings to prevent this bit from causing a PHB error
interrupt. However, there's not much point in doing this since the
system is going to checkstop anyway.

Removing the code to disable the interrupt simplifies the situation a
bit and avoids conflating FIR propagation with the normal PHB error
interrupts. The PHB spec is actively confusing in this area since it
describes the TXE Error summary bit in the LEM FIR as an "interrupt"
even though it's completely seperate to the PHB's LSI error reporting
interrupt.

Cc: Michael Neuling <mikey at neuling.org>
Signed-off-by: Oliver O'Halloran <oohall at gmail.com>
---
Mikey, please check if I'm speaking crap. I might have missed something.
---
 hw/phb4.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/hw/phb4.c b/hw/phb4.c
index 2591c0390d5f..7bbed8a8a829 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -5303,10 +5303,7 @@ static void phb4_init_hw(struct phb4 *p)
 
 	/* Init_126..130 - Re-enable error interrupts */
 	out_be64(p->regs + PHB_ERR_IRQ_ENABLE,			0xca8880cc00000000ull);
-	if (phb4_is_dd20(p))
-		out_be64(p->regs + PHB_TXE_ERR_IRQ_ENABLE,		0x2000400e08200000ull);
-	else
-		out_be64(p->regs + PHB_TXE_ERR_IRQ_ENABLE,		0x2008400e08200000ull);
+	out_be64(p->regs + PHB_TXE_ERR_IRQ_ENABLE,		0x2008400e08200000ull);
 	out_be64(p->regs + PHB_RXE_ARB_ERR_IRQ_ENABLE,		0xc40038fc01804070ull);
 	out_be64(p->regs + PHB_RXE_MRG_ERR_IRQ_ENABLE,		0x00006100008000a8ull);
 	out_be64(p->regs + PHB_RXE_TCE_ERR_IRQ_ENABLE,	0x60510050c0000000ull);
-- 
2.21.1