[Skiboot] [PATCH V4] VAS: Alloc IRQ and port address for each VAS instance
Haren Myneni
haren at linux.vnet.ibm.com
Sat Oct 26 19:47:35 AEDT 2019
Setup IRQ and trigger port for each VAS instance. Export these
values through device-tree with 'interrupts' and 'ibm,vas-port'
properties in each VAS device node. Kernel setup IRQ and register
port address for each send window.
Enable 'vas-user-space' NVRAM config to allocate IRQ sources and
provide 'interrupts' property.
nvram -p ibm,skiboot --update-config vas-user-space=enable
Signed-off-by: Sukadev Bhattiprolu <sukadev at linux.vnet.ibm.com>
Signed-off-by: Haren Myneni <haren at us.ibm.com>
---
Changelog:
V2: Use standard 'interrupts' property as suggested by Oliver
V3: Do not return if can not allocate interrupt. Needed only
for user space.
V4: Alloc IRQ resource as an opt-in feature with NVRAM config
vas-user-space=enable.
diff --git a/doc/device-tree/vas.rst b/doc/device-tree/vas.rst
index 438e45f..7c11c78 100644
--- a/doc/device-tree/vas.rst
+++ b/doc/device-tree/vas.rst
@@ -18,6 +18,12 @@ Each VAS node contains: ::
ibm,vas-id: unique identifier for each instance of VAS in the system.
+ ibm,vas-port: Port address for the interrupt.
+
+ interrupts: <IRQ# level> for this VAS instance.
+
+ interrupt-parent: Interrupt controller phandle.
+
reg: contains 8 64-bit fields.
Fields [0] and [1] represent the Hypervisor window context BAR
diff --git a/doc/vas.rst b/doc/vas.rst
new file mode 100644
index 0000000..5ec6593
--- /dev/null
+++ b/doc/vas.rst
@@ -0,0 +1,15 @@
+Virtual Accelerator Switchboard (VAS)
+
+This document provides information about using VAS from user space.
+Applications send NX requests using COPY/PASTE instructions. NX raises
+an interrupt when it sees fault on the request buffer. Kernel handles
+the interrupt and process the fault.
+
+Skiboot allocates the IRQ and exports it with interrupts property. To
+provide backward compatibility for older kernels, enable VAS user space
+support with NVRAM command.
+
+ nvram -p ibm,skiboot --update-config vas-user-space=enable
+
+This nvram config update is temporary and can be removed in future if
+not needed.
diff --git a/hw/vas.c b/hw/vas.c
index 212da0e..b913519 100644
--- a/hw/vas.c
+++ b/hw/vas.c
@@ -6,6 +6,9 @@
#include <phys-map.h>
#include <xscom.h>
#include <io.h>
+#include <xive.h>
+#include <interrupts.h>
+#include <nvram.h>
#include <vas.h>
#define vas_err(__fmt,...) prlog(PR_ERR,"VAS: " __fmt, ##__VA_ARGS__)
@@ -24,6 +27,7 @@ struct vas {
uint64_t xscom_base;
uint64_t wcbs;
uint32_t vas_irq;
+ uint64_t vas_port;
};
static inline void get_hvwc_mmio_bar(int chipid, uint64_t *start, uint64_t *len)
@@ -402,6 +406,12 @@ static void create_mm_dt_node(struct proc_chip *chip)
dt_add_property(dn, "ibm,vas-id", &vas->vas_id, sizeof(vas->vas_id));
dt_add_property(dn, "ibm,chip-id", &gcid, sizeof(gcid));
+ if (vas->vas_irq) {
+ dt_add_property_cells(dn, "interrupts", vas->vas_irq, 0);
+ dt_add_property_cells(dn, "interrupt-parent",
+ get_ics_phandle());
+ dt_add_property_u64(dn, "ibm,vas-port", vas->vas_port);
+ }
}
/*
@@ -423,6 +433,26 @@ static void disable_vas_inst(struct dt_node *np)
reset_north_ctl(chip);
}
+static void vas_setup_irq(struct proc_chip *chip)
+{
+ uint64_t port;
+ uint32_t irq;
+
+ irq = xive_alloc_ipi_irqs(chip->id, 1, 64);
+ if (irq == XIVE_IRQ_ERROR) {
+ vas_err("Failed to allocate interrupt sources for chipID %d\n",
+ chip->id);
+ return;
+ }
+
+ vas_vdbg("trigger port: 0x%p\n", xive_get_trigger_port(irq));
+
+ port = (uint64_t)xive_get_trigger_port(irq);
+
+ chip->vas->vas_irq = irq;
+ chip->vas->vas_port = port;
+}
+
/*
* Initialize one VAS instance and enable it if @enable is true.
*/
@@ -452,6 +482,13 @@ static int init_vas_inst(struct dt_node *np, bool enable)
init_rma(chip))
return -1;
+ /*
+ * Use NVRAM 'vas-user-space' config for backward compatibility
+ * to older kernels. Remove this option in future if not needed.
+ */
+ if (nvram_query_eq_dangerous("vas-user-space", "enable"))
+ vas_setup_irq(chip);
+
create_mm_dt_node(chip);
prlog(PR_INFO, "VAS: Initialized chip %d\n", chip->id);
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