[Skiboot] [PATCH 02/16] core/pci: Add missing lock in set_power_timer

Oliver O'Halloran oohall at gmail.com
Tue Oct 1 16:19:54 AEST 2019


On Mon, 2019-09-09 at 14:31 +0200, Frederic Barrat wrote:
> set_power_timer() was not using any lock, though it alters the slot
> state and devices found under it. So lock the PHB under which the slot
> is found to avoid concurrent operations.

This is probably fine, but I was always worried there was potential for
deadlocks if we took it here. 

> Signed-off-by: Frederic Barrat <fbarrat at linux.ibm.com>
> ---
>  core/pci-opal.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/core/pci-opal.c b/core/pci-opal.c
> index d5209600..175810d0 100644
> --- a/core/pci-opal.c
> +++ b/core/pci-opal.c
> @@ -674,7 +674,9 @@ static void set_power_timer(struct timer *t __unused, void *data,
>  	struct pci_device *pd = slot->pd;
>  	struct dt_node *dn = pd->dn;
>  	uint8_t link;
> +	struct phb *phb = slot->phb;
>  
> +	phb_lock(phb);
>  	switch (slot->state) {
>  	case PCI_SLOT_STATE_SPOWER_START:
>  		if (slot->retries-- == 0) {
> @@ -720,6 +722,7 @@ static void set_power_timer(struct timer *t __unused, void *data,
>  		prlog(PR_ERR, "PCI SLOT %016llx: Unexpected state 0x%08x\n",
>  		      slot->id, slot->state);
>  	}
> +	phb_unlock(phb);
>  }
>  
>  static int64_t opal_pci_set_power_state(uint64_t async_token,



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