[Skiboot] [PATCH] lpc-port80h: Don't write port 80h when running under Simics
Alistair Popple
alistair at popple.id.au
Thu May 30 16:05:15 AEST 2019
Simics doesn't model LPC port 80h. Writing to it terminates the
simulation due to an invalid LPC memory access. This patch adds a
check to ensure port 80h isn't accessed if we are running under
Simics.
Signed-off-by: Alistair Popple <alistair at popple.id.au>
---
hw/lpc-port80h.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/lpc-port80h.c b/hw/lpc-port80h.c
index 60bde926..caff0fdc 100644
--- a/hw/lpc-port80h.c
+++ b/hw/lpc-port80h.c
@@ -18,6 +18,7 @@
#include <lpc.h>
#include <op-panel.h>
+#include <chip.h>
/*
* Convert our detailed op_display() call into 1 byte for LPC port 80h
@@ -168,6 +169,9 @@ void op_display_lpc(enum op_severity s, enum op_module m, uint16_t c)
static uint8_t port80_val = 0x80;
static uint16_t port8x_val = 0x8000;
+ if (chip_quirk(QUIRK_SIMICS))
+ return;
+
port80_val = op_display_to_port80(port80_val, s, m, c);
lpc_outb(port80_val, 0x80);
port8x_val = op_display_to_port8x(port8x_val, s, m, c);
--
2.11.0
More information about the Skiboot
mailing list