[Skiboot] [PATCH v2 7/9] slw: Limit fused cores P9 to STOP0/1
Vaidyanathan Srinivasan
svaidy at linux.vnet.ibm.com
Thu Mar 21 19:49:26 AEDT 2019
* Michael Neuling <mikey at neuling.org> [2019-03-19 17:04:03]:
> From: Benjamin Herrenschmidt <benh at kernel.crashing.org>
>
> Linux doesn't know how to properly restore state on "both halves" of
> a fused core, so limit ourselves to STOP states that don't require
> HV state restore for bare metal kernels (KVM is still broken) until
> we add a new representation for STOP states.
>
> The new representation will have per-state versioning so that we
> can control their individual enablement based on whether the OS
> has the necessary workarounds to make them work.
>
> Signed-off-by: Benjamin Herrenschmidt <benh at kernel.crashing.org>
> Signed-off-by: Michael Neuling <mikey at neuling.org>
Reviewed-by: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
Tested-by: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
This patch series works on P9 big-core configuration and stop0/1
tested ok. STOP2 is also working, but we will stress test for more
time before enabling by default.
> ---
> hw/slw.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 67 insertions(+)
>
> diff --git a/hw/slw.c b/hw/slw.c
> index adbfdce950..d68701b7ea 100644
> --- a/hw/slw.c
> +++ b/hw/slw.c
> @@ -701,6 +701,70 @@ static struct cpu_idle_states power9_mambo_cpu_idle_states[] = {
>
> };
>
> +/* FIXME check these haven't changed */
> +static struct cpu_idle_states power9_bigcores_cpu_idle_states[] = {
> + {
> + .name = "stop0_lite", /* Enter stop0 with no state loss */
> + .latency_ns = 1000,
> + .residency_ns = 10000,
> + .flags = 0*OPAL_PM_DEC_STOP \
> + | 0*OPAL_PM_TIMEBASE_STOP \
> + | 0*OPAL_PM_LOSE_USER_CONTEXT \
> + | 0*OPAL_PM_LOSE_HYP_CONTEXT \
> + | 0*OPAL_PM_LOSE_FULL_CONTEXT \
> + | 1*OPAL_PM_STOP_INST_FAST,
> + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(0) \
> + | OPAL_PM_PSSCR_MTL(3) \
> + | OPAL_PM_PSSCR_TR(3),
> + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },
> + {
> + .name = "stop0",
> + .latency_ns = 2000,
> + .residency_ns = 20000,
> + .flags = 0*OPAL_PM_DEC_STOP \
> + | 0*OPAL_PM_TIMEBASE_STOP \
> + | 1*OPAL_PM_LOSE_USER_CONTEXT \
> + | 0*OPAL_PM_LOSE_HYP_CONTEXT \
> + | 0*OPAL_PM_LOSE_FULL_CONTEXT \
> + | 1*OPAL_PM_STOP_INST_FAST,
> + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(0) \
> + | OPAL_PM_PSSCR_MTL(3) \
> + | OPAL_PM_PSSCR_TR(3) \
> + | OPAL_PM_PSSCR_ESL \
> + | OPAL_PM_PSSCR_EC,
> + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },
> + {
> + .name = "stop1_lite", /* Enter stop1 with no state loss */
> + .latency_ns = 4900,
> + .residency_ns = 49000,
> + .flags = 0*OPAL_PM_DEC_STOP \
> + | 0*OPAL_PM_TIMEBASE_STOP \
> + | 0*OPAL_PM_LOSE_USER_CONTEXT \
> + | 0*OPAL_PM_LOSE_HYP_CONTEXT \
> + | 0*OPAL_PM_LOSE_FULL_CONTEXT \
> + | 1*OPAL_PM_STOP_INST_FAST,
> + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \
> + | OPAL_PM_PSSCR_MTL(3) \
> + | OPAL_PM_PSSCR_TR(3),
> + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },
> + {
> + .name = "stop1",
> + .latency_ns = 5000,
> + .residency_ns = 50000,
> + .flags = 0*OPAL_PM_DEC_STOP \
> + | 0*OPAL_PM_TIMEBASE_STOP \
> + | 1*OPAL_PM_LOSE_USER_CONTEXT \
> + | 0*OPAL_PM_LOSE_HYP_CONTEXT \
> + | 0*OPAL_PM_LOSE_FULL_CONTEXT \
> + | 1*OPAL_PM_STOP_INST_FAST,
> + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \
> + | OPAL_PM_PSSCR_MTL(3) \
> + | OPAL_PM_PSSCR_TR(3) \
> + | OPAL_PM_PSSCR_ESL \
> + | OPAL_PM_PSSCR_EC,
> + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },
> +};
> +
> static void slw_late_init_p9(struct proc_chip *chip)
> {
> struct cpu_thread *c;
> @@ -784,6 +848,9 @@ void add_cpu_idle_state_properties(void)
> if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS) {
> states = power9_mambo_cpu_idle_states;
> nr_states = ARRAY_SIZE(power9_mambo_cpu_idle_states);
> + } else if (this_cpu()->is_fused_core) {
> + states = power9_bigcores_cpu_idle_states;
> + nr_states = ARRAY_SIZE(power9_bigcores_cpu_idle_states);
> } else {
> states = power9_cpu_idle_states;
> nr_states = ARRAY_SIZE(power9_cpu_idle_states);
The number of defined state can be reduced and we can include stop2
after some more test. I will rework this patch and post an update.
--Vaidy
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