[Skiboot] [PATCH v2 1/5] skiboot/doc: Add documentation for trace-mode in imc.rst

Anju T Sudhakar anju at linux.vnet.ibm.com
Tue Mar 5 16:40:45 AEDT 2019

Hi Stewart,

Thank you for reviewing the patch.

On 2/25/19 9:27 AM, Stewart Smith wrote:
> Anju T Sudhakar <anju at linux.vnet.ibm.com> writes:
>> Add documentation for IMC trace-mode in imc.rst.
>> Signed-off-by: Anju T Sudhakar <anju at linux.vnet.ibm.com>
>> ---
>>   doc/imc.rst | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>> diff --git a/doc/imc.rst b/doc/imc.rst
>> index 3324aa36..40d262f0 100644
>> --- a/doc/imc.rst
>> +++ b/doc/imc.rst
>> @@ -44,6 +44,15 @@ sampling duration) fetches the counter data and accumulate to main memory.
>>   Memory to accumulate counter data are refered from "PDBAR" (per-core scom)
>>   and "LDBAR" per-thread spr.
>> +Trace mode of IMC:
>> +------------------
>> +
>> +POWER9 support two modes for IMC which are the Accumulation mode and
>> +Trace mode. In IMC Trace mode, event counted is fixed for cycles and on
>> +each overflow, hardware snapshots the program counter along with other
>> +details and writes into memory pointed by LDBAR. LDBAR has bits to
>> +indicate the IMC trace-mode.
>> +
> I'm having trouble parsing what's being said here.
> I can't understand what "event counted is fixed for cycles" means, nor
> what overflow is being referred to.

So here, the event which we are counting is `cycles`, and for the time 

this event is fixed. Also we are writing a 64 bit value to(trace-scom 
value) to trace-imc

address. This value has a field called 'cpmc_load' (which is mentioned 
in the

subsequent patch), and when the cpmc counter overflows the data captured

is written to the memory.

> This needs to be reworded so it's clear as to what's going on and what
> the trace mode means and does.

Sure. I will brief this in a better way.



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