[Skiboot] [PATCH v9 05/25] mem-map: Setup memory for MDDT table

Vasant Hegde hegdevasant at linux.vnet.ibm.com
Fri Jul 12 21:17:42 AEST 2019


Each entry in MDST and MDDT takes 16 bytes. With 1K we can have upto 64
entries. This is sufficient to support OPAL MPIPL (memory preserving IPL).

Presently OPAL reserves 2K memory for MDST table. Lets split this into two
region of 1K for MDST and MDDT table.

Signed-off-by: Vasant Hegde <hegdevasant at linux.vnet.ibm.com>
---
 include/mem-map.h | 10 +++++++---
 skiboot.lds.S     |  7 ++++++-
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/include/mem-map.h b/include/mem-map.h
index fc535e587..d23953985 100644
--- a/include/mem-map.h
+++ b/include/mem-map.h
@@ -1,4 +1,4 @@
-/* Copyright 2013-2014 IBM Corp.
+/* Copyright 2013-2019 IBM Corp.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -49,12 +49,16 @@
  */
 #define PROCIN_OFF		(SPIRA_OFF + 0x800)
 
-/* Initial MDST table like PROCIN, we need fixed addresses,
+/* Initial MDST and MDDT tables like PROCIN, we need fixed addresses,
  * we leave a 2k gap for PROCIN
  */
 #define MDST_TABLE_OFF		(SPIRA_OFF + 0x1000)
+#define MDST_TABLE_SIZE		0x400
 
-/* Like MDST, we need fixed address for CPU control header.
+#define MDDT_TABLE_OFF		(SPIRA_OFF + 0x1400)
+#define MDDT_TABLE_SIZE		0x400
+
+/* Like MDST and MDDT, we need fixed address for CPU control header.
  * We leave a 2k gap for MDST. CPU_CTL table is of size ~4k
  */
 #define CPU_CTL_OFF             (SPIRA_OFF + 0x1800)
diff --git a/skiboot.lds.S b/skiboot.lds.S
index 4a7727dc9..5fb32c866 100644
--- a/skiboot.lds.S
+++ b/skiboot.lds.S
@@ -1,4 +1,4 @@
-/* Copyright 2013-2018 IBM Corp.
+/* Copyright 2013-2019 IBM Corp.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -90,6 +90,11 @@ SECTIONS
 		KEEP(*(.mdst.data))
 	}
 
+	. = MDDT_TABLE_OFF;
+	.mddt : {
+		KEEP(*(.mddt.data))
+	}
+
 	. = CPU_CTL_OFF;
 	.cpuctrl : {
 		KEEP(*(.cpuctrl.data))
-- 
2.14.3



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